Compute & Hardware

A plain guide to who designs the software behind every chip, who builds the silicon, and why almost nobody in that chain uses only one vendor.

By Shashi Bellamkonda · July 22, 2026

 A CIO tracking AI infrastructure spending watches GPU allocations, cloud contracts and model licensing. Chip design teams track the software that decides whether a chip gets built at all. 

Synopsys narrowed its own software business this year, walking away from a product line it used to sell chipmakers.

Chinese vendors widened theirs at the same time, using a US export ban as the reason to build a domestic alternative nobody expected to matter this soon.

 A fifteen-million-dollar startup added a third claim into the mix, betting it can replace years of manual chip tuning with a few days of AI work. A hardware roadmap will not tell a buyer any of this, and it changes what that roadmap can promise.

A Chip Is Designed Long Before Anyone Builds It

A modern chip can carry more than twenty billion transistors, too many to place by hand. The design starts as an architecture, a plan for what the chip needs to do, then gets written in a hardware description language such as Verilog or VHDL. Software translates that into a logic gate netlist, a process called synthesis. More software then decides where every gate sits on the silicon, checks timing and power, and verifies the design will not fail once it is manufactured. Only after all of that does a design get sent out for fabrication, a step called tape-out.

Every one of those steps runs on commercial software.

Three Companies Write the Software That Does This

Chip design software is called electronic design automation (EDA), and it did not start as a separate industry. Large chipmakers in the 1960s and 1970s, companies such as Intel and Texas Instruments, wrote these tools in-house because nobody sold them yet. The commercial application-specific integrated circuit (ASIC) industry that grew up in the 1980s could not afford to build that software itself, and the engineering teams that had built it inside the big OEMs split off to found companies that would sell it instead.

Three of those companies still dominate the category. Synopsys holds close to a third of the global EDA market and leads in synthesis and simulation tools. Cadence holds a similar share and leads in custom and analog layout. Siemens EDA, built around the company once known as Mentor Graphics, holds an estimated ten to fifteen percent and dominates physical verification. Together the three control seventy to eighty percent of global EDA revenue, a concentration that has held for over a decade despite constant product turnover underneath it.

Using Multiple Design Vendors is Common Practice Almost Nobody Uses Only One of Them

Apple does not use one vendor, and neither does Nvidia. Both use all three, for different jobs, on the same chip. Synopsys Design Compiler and VCS are the standard for synthesis and simulation. Cadence Virtuoso is the standard for analog and custom layout, and its Innovus tool leads digital implementation. Siemens Calibre runs physical verification on nearly every tape-out in the industry, regardless of which vendor handled the earlier stages.

A large fabless designer such as Nvidia, Qualcomm or Broadcom licenses tools from all three vendors on a single chip program, because no single vendor's flow is complete on its own. That is what a real duopoly plus one looks like in practice: three companies, each holding a piece of every customer instead of fighting over whole ones.

Someone Still Has to Build the Thing and Who Are They?

Design and manufacturing are separate businesses, and most of the companies whose names appear on a chip do not own a factory. Nvidia, Apple, Qualcomm, AMD and Broadcom are fabless: they design chips and hand the finished layout to a foundry that fabricates the silicon. TSMC held close to seventy percent of the global foundry market in the first quarter of 2026. Samsung Foundry ran a distant second at 6.5 percent, followed by SMIC at 5.1 percent, UMC at 3.9 percent and GlobalFoundries at 3.3 percent.

Intel is the exception worth naming. It designed and manufactured its own chips for decades as an integrated device manufacturer (IDM), and it is now trying to sell that fabrication capacity to outside customers as Intel Foundry, in direct competition with the company it used to only face on the design side.

Two Very Different Kinds of Challenger Are Pushing In

The first challenge is geopolitical. When the United States restricted EDA software sales to China, Chinese chipmakers turned to domestic vendors nobody outside the industry had heard of a decade ago. Empyrean Technology, Primarius Technologies and Semitronix now count more than a hundred smaller domestic competitors around them, and Empyrean alone claims half of that local market. Huawei has said it will open-source the software toolkit for its own Ascend AI chips, a direct answer to Nvidia's proprietary Compute Unified Device Architecture (CUDA). None of these tools compete with Synopsys or Cadence at the leading edge yet. They exist because export policy made that gap worth closing.

The second challenge has nothing to do with geography.

The Incumbents Are Placing a Different Bet Than Each Other

Synopsys spent thirty five billion dollars in 2025 acquiring Ansys and is now discontinuing manufacturing process control software, tools that watch for anomalies on the factory floor, to redirect engineers toward AI-driven chip design instead. Synopsys told Samsung, SK Hynix, Kioxia and Qorvo about the decision rather than asking them, and Samsung says it already has a substitute built. Cadence is betting the opposite direction, expanding its Cerebrus AI Studio and ChipStack agents across the full design and verification flow and claiming five to ten times faster time to market.

The claim underneath all of this, that AI can compress years of manual chip work into hours, has one documented instance of outside scrutiny. Google's AlphaChip, a reinforcement learning method used across generations of its own Tensor Processing Units and adopted outside Google by MediaTek, was tested outside Google in 2023 by University of Michigan researcher Igor Markov, whose reproduction attempt found it lagged behind human designers, a decades-old algorithm called simulated annealing, and ordinary commercial design software. Google disputed the finding and Nature's review sided with the original paper. Nobody has run an equivalent outside test on Cerebrus, ChipStack, or Infinity.inc's Ignition agent, the year-old startup that raised fifteen million dollars this month betting it can do to Nvidia's CUDA moat what AlphaChip claims to have done to chip layout.

Why This Belongs on a CIO's Reading List

None of these companies sell to a typical enterprise buyer. Their decisions still set the ceiling on what every AI chip, server and edge device can do, and how fast a new entrant can compete with the incumbents an enterprise already depends on. A single export rule can cut off a software vendor from an entire country's chip industry in a weekend. A single acquisition can make an EDA giant decide a category of software it has sold for decades is no longer worth maintaining. Neither event shows up in a vendor's marketing deck until the contract renewal forces it into view.